Various types of multi-patterning photolithography techniques can be utilized to manufacture semiconductor integrated circuits. Such multi-patterning techniques include sidewall image transfer (SIT), self-aligned doubled patterning (SADP), and self-aligned quadruple patterning (SAQP) techniques, for example. These multi-patterning methods are utilized to enhance feature density, and are expected to be particularly useful and necessary for the next generation technology nodes, e.g., 10 nm and beyond. The current SIT, SADP and SAQP methods utilize deposition and etch back processes to create uniform memorization and transfer elements. In particular, these techniques involve spacer patterning steps in which spacers are formed on the sidewalls of sacrificial features (e.g., sacrificial mandrels), and the sacrificial features are removed, leaving a pattern of spacers which is utilized to etch features into an underlying layer at sub-lithographic dimensions. As is known in the art, the term “critical dimension” (CD) refers to the dimensions of the smallest geometrical features (width of interconnect line, contacts, trenches, etc.) which can be formed during semiconductor device fabrication using a given semiconductor technology. The CD is primarily determined by material thicknesses and etch rates. While wet and dry isotropic etch methods can be used to further reduce features below the CD of the features, these isotropic etch techniques are limited by the etch selectivity of the surrounding semiconductor materials.